Apple Inc. is seeking an ASIC STA Engineer in Melbourne, Australia. The ideal candidate will develop and manage timing constraints for SoC designs, ensuring sign-off quality. Responsibilities include collaborating with RTL and physical design teams, innovating timing flows, and verifying constraints. With a BS degree and over 10 years of experience, candidates should possess strong communication skills and a proactive attitude.
This role offers the opportunity to work in a diverse environment focused on inclusion and quality.
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