Senior Technical Writer
Locations:
UK, Remote Europe
Role Overview
We are seeking a Senior Technical Writer to create comprehensive hardware documentation for our next-generation, high-performance chip interconnect fabric Intellectual Property (IP). You will bridge the gap between complex silicon architecture and hardware engineering customers. You will translate RTL designs, microarchitecture specifications, and configuration registers into clear, actionable technical manuals. This role requires close collaboration with design, verification, and systems engineering teams in a fast-paced startup environment.
Key Responsibilities:
* Create Technical Manuals: Write architecture specifications, integration guides, and data sheets.
* Document Register Maps: Author detailed register descriptions and memory map definitions.
* Develop User Guides: Produce step‐by‐step guides for IP configuration, synthesis, and verification.
* Standardize Documentation: Establish templates, style guides, and documentation release workflows.
* Edit Engineering Drafts: Refine internal design notes into customer‐facing collateral.
* Manage Version Control: Maintain documentation pipelines tied to hardware RTL release cycles.
Required Skills & Qualifications
* Domain Knowledge: Deep understanding of Network‐on‐Chip (NoC) or AMBA protocols (AXI, CHI, ACE).
* Hardware Literacy: Ability to read Verilog/SystemVerilog and understand silicon design flows.
* Tools Expertise: Proficiency with DITA, XML, Markdown, Sphinx, or FrameMaker.
* Automation Skills: Experience scripting (Python, Perl) to extract register data from Excel/RAL.
* Startup Agility: Ability to thrive independently with evolving specifications and tight deadlines.
* Education: Bachelor's degree in EE, CS, Technical Writing, or equivalent experience.
* Experience: 5+ years documenting semiconductor IP or complex SoC architectures.
Desired Qualifications
* Experience with automated doc‐from‐code pipelines (Git, CI/CD).
* Familiarity with PCIe, CXL, or CCIX interconnect standards.
* Knowledge of hardware emulation and verification environments.
* CHI, AXI, proprietary NoC experience.
* Sphinx familiarity.
rich.goldstein@bayasystems.com
Compensation
* Salary commensurate with experience
* Performance incentives
* Comprehensive medical, dental, and vision benefits
* 401(k) retirement plan
* Equity
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