Job Description:
We are seeking a highly skilled Digital Fault Tolerant Engineer/Architect to join our team in Cambridge.
The ideal candidate will have hands-on experience with modern digital fault tolerant tools and a strong grounding in IC development.
Key Responsibilities:
* Implementing digital fault tolerant strategies
* Collaborating with cross-functional teams
* Contributing to innovative projects in a dynamic environment
About the Role:
This is an excellent opportunity for a talented individual to take on a leadership role in the development of next-generation ASICs.
Requirements:
* Hands-on experience with digital fault tolerant tools
* Strong grounding in IC development
* Excellent collaboration and communication skills
What We Offer:
We offer a competitive salary, comprehensive benefits package, and opportunities for career growth and professional development.