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High performance wireless solutions developer

Sydney
Bebeeengineer
Developer
Posted: 12 September
Offer description

Next Generation Wi-Fi Technology Engineer
About our innovative solutions: We are at the forefront of delivering breakthrough wireless connectivity products that redefine performance and reliability. Our pioneering designs meet evolving market demands, providing superior technology.
Are you a skilled Wi-Fi chip designer with expertise in the IEEE 802.11 PHY Layer? Do you want to play a pivotal role in creating next generation Wi-Fi chips that will enable the Internet of Things (IoT)? Keen to make a real difference while working in a dynamic environment?
You will be responsible for designing, integrating, verifying, and bringing up an IEEE 802.11ah PHY to be used in our family of Wi-Fi chips. You'll collaborate with digital, systems, and firmware teams to architect and verify the PHY, ensuring functional and performance goals are met.
Your day-to-day will involve RTL design and simulation using contemporary languages and tools. You'll work closely with the team to address and improve digital and system aspects of the design. You'll also help with bring-up of the PHY on silicon, evaluate performance of pre-production silicon, and take your design to high-volume mass production.
Developing 802.11ah PHY components in Scala, SystemVerilog, and C
Functional verification of 802.11ah PHY in RTL simulators, SDF-annotated gate level simulators, and AMS simulators using SystemVerilog, Verilog-A, Matlab, C, and Python
Collaborating with the Systems team to achieve optimal performance
Working closely with the Analog & RF team to define and improve radio interfaces
Collaborating with the Firmware team to develop embedded PHY firmware
Providing overall technical expertise and brilliance
Essential Skills:
Bachelor's or Master's degree in Electrical / Electronics / Communication Engineering or Computer Science
3+ years experience as a PHY IC Design Engineer
Solid understanding of digital signal processing (DSP), emphasizing HW implementation
Proven experience developing multiple DSP blocks in complex SoCs
Understanding of the IEEE 802.11 PHY layer and familiarity with 802.11ah
Deep understanding of digital design fundamentals including low power and multi-clock-domain design
Hands-on experience with Cadence or Synopsys simulation suite
Hands-on experience with Linux development environment staples like make, shell scripts, and Python
Excellent verbal and written communication skills
Proven ability to work constructively within teams and among other groups
Strong analytical and problem-solving skills
Determination to deliver results under time pressures
Practical attitude
Bonus Skills:
Proven experience performing PHY bring-up, debug, and performance measurement on silicon in the lab
Good understanding of embedded processors, familiarity with RISC-V is beneficial
Solid understanding of mixed signal ASIC design and simulation
Experience using git revision control tool
Experience with development and debugging of digital designs from RTL design through
Benefits:
We offer competitive salary and excellent stock option package, performance bonus opportunity, income protection insurance, healthy work environment, flexible work arrangement policy, community and social groups, and much more.

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