Job Title: Staff Physical Design Engineer
This role involves collaborating with architects, designers and engineers to achieve area and power targets, timing closure and routability in the physical implementation of designs. The successful candidate will work on synthesis, floorplanning and optimization for performance, power and area.
Key responsibilities include:
* Collaborating with cross-functional teams to achieve design goals;
* Working on the physical implementation of designs including synthesis, floorplanning and achieving routability;
* Optimizing designs for performance, power and area;
* Developing scripts and automation to streamline the design process;
* Debugging timing failures and working with RTL engineers to resolve design issues;
* Reviewing congestion and proposing improvement suggestions;
* Floorplan planning and fine tuning including IO and macro placement;
The ideal candidate should have proficient skills in synthesis flow and tools, debugging timing issues and congestion, PnR flow and tools, Verilog and System Verilog language, Graphics Pipeline knowledge, automating workflows in a distributed compute environment and scripting in TCL, Perl, Makefile, shell and Python. A good understanding and hands-on experience in ECO implementation would be an advantage. A Bachelor's or Master's degree in Computer Engineering or Electrical Engineering is required.