About Us
Silicon Quantum Computing is pioneering the future of quantum technology. As the world's first company to manufacture qubits with atomic precision, we're delivering quantum advantage today, not decades from now. Founded by Professor Michelle Simmons and led by Chair Simon Segars, we have achieved major breakthroughs including the first single‐atom transistor and the first integrated circuit built with atomic precision. Our quantum machine learning chip, Watermelon, is already accelerating AI in ways classical systems can't match. We are generating significant revenue and working closely with multinational partners to solve complex problems with quantum solutions.
About The Role
SQC is embarking on an ambitious journey to develop cryo‐CMOS chips that will enable the miniaturisation of electronic hardware within our quantum computers. This advancement is crucial for building larger and more complex quantum systems. We are looking for a Digital Physical Design Engineer experienced in backend implementation, front‐end awareness, and the engineering intuition to understand why a design behaves the way it does. The ideal candidate will work deep in the physical design flow, debug timing and physical issues, and build automation to make flows robust and repeatable.
Role Responsibilities
* Own major portions of the digital physical implementation flow, including floorplanning, placement, clock tree synthesis, routing, and timing closure
* Debug timing, congestion, power, and signal integrity issues using both tool analysis and engineering judgment
* Work with RTL designers to resolve synthesis and timing issues upstream
* Develop and maintain automation, scripts, and infrastructure to improve design productivity and repeatability
* Improve and extend EDA flows for synthesis, physical implementation, and sign‐off
* Investigate and resolve corner‐case tool behaviour rather than simply rerunning flows
* Collaborate with analog, system, and architecture teams when needed
Essential Qualifications
* Bachelor's or Master's degree in Electrical Engineering, Microelectronics, or a related discipline
* Strong experience with digital physical design flows in advanced CMOS processes
* Hands‐on work with tools such as Synopsys ICC2 / Fusion Compiler, Cadence Innovus, or equivalent
* Deep understanding of static timing analysis, clock tree design, floorplanning and congestion, physical effects impacting timing and power
* Experience writing automation and tooling in Python, Tcl, or similar scripting languages
* Comfortable debugging tool flows and design issues at a root‐cause level
* Ability to read and understand RTL and interact productively with front‐end designers
* Highly organised, detail‐oriented, and able to maintain a strategic perspective in a dynamic start‐up environment
* Excellent communication skills, with the ability to explain complex technical concepts to diverse audiences
Desirable Qualifications
* Experience with synthesis and RTL design
* Familiarity with low‐power methodologies
* Experience improving or building EDA flows from scratch
* Strong debugging mindset and curiosity about how tools and silicon actually behave
* Familiarity with cryo‐CMOS technology and its applications in quantum computing control
Please Note
This position may require access to export‐controlled information (ECI) subject to EAR and ITAR. Final employment decision is contingent upon satisfactory completion of export control screenings and obtaining any necessary export licenses or approvals, based on nationality, citizenship, and other factors considered by applicable export control regulations.
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