Silicon Quantum Computing is pioneering the future of quantum technology.
As the world's first company to manufacture qubits with atomic precision, we're delivering quantum advantage today, not decades from now.
Founded by Professor Michelle Simmons, one of the world's leading materials scientists, SQC has achieved major breakthroughs including the first single-atom transistor and the first integrated circuit built with atomic precision.
Our Chair, Simon Segars, former CEO of ARM, brings deep global experience as we scale our technology and commercial impact.
Our quantum machine learning chip, Watermelon, is already accelerating AI in ways classical systems can't match.
We're generating significant revenue and working closely with multinational partners to solve complex problems with quantum solutions.
SQC is a fast-paced, high-accountability environment where people grow quickly and contribute meaningfully.
If you're excited by deep tech, ambitious about your career, and ready to help shape the future of computing, we'd love to hear from you.
About the role
We're on the lookout for a hands‑on FPGA Design Engineer with experience using Xilinx RFSo C platforms to join our multidisciplinary hardware team.
If you enjoy solving new design challenges, have a solid grounding in both analogue and digital design, and thrive in a fast‑paced environment where RF, digital, and embedded systems come together — this could be the role for you.
You'll be helping to design and integrate advanced systems that make the most of RFSo C technology, working across high‑speed data conversion, digital signal processing, and programmable logic.
You'll report to the Hardware/Embedded System Engineering Lead.
While this role doesn't have direct reports, you'll play a key part in supporting and mentoring others in the team.
Role responsibilities
Develop, implement, and test FPGA‑based designs targeting Xilinx RFSo C devices, including the Zynq Ultra Scale+ RFSo C family
Collaborate on system‑level architecture and partitioning between programmable logic (PL), processing system (PS), and RF/data converter subsystems
Integrate analogue signal chains (e.g., ADCs, DACs) with digital logic in high‑bandwidth and low‑latency systems
Design and implement DSP pipelines, AXI‑based interfaces, and control logic in Verilog (or VHDL)
Work with high‑speed I/O, clocks, resets, and synchronization circuits
Utilise Vivado and Vitis for design, simulation, synthesis, and system integration
Conduct timing closure, resource optimisation, and verification using simulation and hardware‑in‑the‑loop testing
Support hardware bring‑up, signal integrity analysis, and debugging with test equipment (oscilloscopes, spectrum analysers, etc.)
Explore and prototype new design ideas, contributing to architecture discussions and innovation
Ensure hazards and risks psychosocial and physical are identified and controlled for tasks, projects, and activities that pose a health and safety risk within your area of responsibility.
Your experience
A degree in Electrical Engineering (or equivalent), with 3–6 years of hands‑on FPGA development experience
Extensive experience working with Xilinx RFSo C platforms, particularly Ultra Scale+ Zynq‑based devices
Proficient in RTL design using VHDL, Verilog, or System Verilog
Skilled in using the Xilinx Vivado Design Suite, including IP Integrator, block design methodology, and constraint management
Solid understanding of analogue signal behaviour, sampling theory, and integration of mixed‑signal systems
Familiarity with digital signal processing techniques such as filtering, decimation/interpolation, FFTs, and modulation
Practical knowledge of CPU microarchitecture design, including ALUs, pipelines, and memory interfaces.
Experience with implementing soft‑core CPUs on FPGA is a strong plus
Proficient in integrating AXI4 interfaces and DMA engines with embedded software running on ARM processors
Experience contributing to Python‑based driver layers and writing robust unit tests for automated build systems and CI/CD workflows
Working knowledge of software development in languages such as Rust or C
Demonstrated curiosity and willingness to engage with novel architectures, explore design trade‑offs, and participate in iterative prototyping.
The recruitment process
For roles at SQC, expect 3–4 interviews, meeting a few members of the team and focusing on your core eligibility for the role, your skills and how they align, and finally your values and how they align.
We'll give you a more specific runthrough if you're successful in making it to the first interview.
As part of our obligations to our clients, we require that successful candidates submit to background checks, including a National Police Check, Right to Work checks, as well as employment and qualifications verification.
We won't contact anyone until we're confident there's a fit between SQC and yourself.
How to apply
The best and simplest way is to apply directly here, rather than messaging anyone on the SQC team directly.
If you have any questions that you'd like answered before committing to applying, please feel free to email us at
Please note
This position may require access to export‑controlled information (ECI) subject to EAR and ITAR.
Final employment decision is contingent upon satisfactory completion of export control screenings and obtaining any necessary export licenses or approvals, based on nationality, citizenship, and other factors considered by applicable export control regulations.
Seniority level
Not applicable
Employment type
Other
Job function
Engineering and Information Technology
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