Platform EDA Engineer Exclusive Retained Search | Cadence Connect Cadence Connect has been exclusively retained to appoint a Platform EDA Engineer for our client, a deep-tech company building next generation RTL simulation and synthesis infrastructure. This is not a typical backend role. This is infrastructure-heavy, systems-focused engineering. You will architect and scale the execution layer powering AI-driven chip design workflows, building the containerised, low-latency backend services that allow engineers to run Verilog/SystemVerilog flows reliably across FPGA and ASIC toolchains. What will you be doing? You will design, build and harden the backend platform that underpins: RTL simulation, synthesis, implementation and bitstream generation Multi-simulator orchestration (Icarus Verilog, Verilator, XSIM) FPGA and VLSI design flows This role is about reliability, orchestration and clean abstraction over complex EDA toolchains. You will be responsible for Backend & Job Orchestration Production-grade Python APIs (FastAPI, Flask or Django) Stateful job orchestration with stage tracking and error recovery Multi-user workspace isolation and snapshot management Timeout handling, subprocess control and zombie process cleanup Deterministic file handling across simulation runs EDA Toolchain abstraction FPGA flow orchestration (IP gen → synthesis → implementation → bitstream) VLSI flow orchestration (verification, netlisting, PnR, signoff) Unified diagnostic parsing for structured downstream consumption Clean, predictable interfaces that shield frontend and AI layers from toolchain complexity Cloud & Infrastructure Containerised EDA environments with correct sourcing and configuration CI/CD automation (GitHub Actions, GitLab CI or similar) Production vs development environment separation Health checks, startup reliability and graceful shutdown Infrastructure trade-off decisions (containers vs VMs, managed vs self-hosted) Performance Expectations 99% EDA job reliability Reduced median job latency via optimisation and caching Zero-downtime deployments with rollback capability Comprehensive API test coverage Scalable architecture supporting multi-user growth What will you bring? 2–5 years in backend, platform, or infrastructure engineering Strong production Python experience Docker and containerised, deployment experience CI/CD exposure Cloud infrastructure experience (AWS, GCP or similar) Exposure to EDA tools or hardware design workflows highly regarded Your technical strengths Async programming & API design Process management and long-running job control Multi-stage Docker builds Debugging complex toolchain interactions Strong engineering discipline (testing, documentation, reproducibility) Why apply? You will shape the backend infrastructure enabling AI-driven chip design, a platform level engineering challenge with real technical depth. Cadence Connect is managing this search exclusively and will engage directly with shortlisted candidates. For a confidential discussion, please apply directly or contact mike.priest@cadenceconnect.com.au