Job Title
A talented and skilled Verification Engineer is sought after by a leading organization in Bangalore to take on the role of a Post Silicon Test Engineer.
* The ideal candidate will have a strong educational background in EE/ECE/CE/CS with at least 1 year of experience and advanced knowledge of C++ and Object Oriented Programming (OOP) concepts.
* The selected individual will be responsible for functional verification with an emphasis on core level test planning, stimulus development, and regression debug for simulation and emulation regressions.
* Proficiency in debugging RTL and Digital Verification (DV) in a simulation environment, as well as expertise in waveform and log file based debug, are highly desirable.
* The successful applicant will also have experience with assembly, C/C++, and Universal Verification Methodology (UVM) based stimulus generation.
Key Requirements:
* Advanced knowledge of Verilator and SystemC.
* Strong problem solving and debugging skills across various levels of design hierarchies.
About the Role
This position involves working closely with the team to deliver high-quality results and meet project deadlines. The ideal candidate will be proactive, flexible, and willing to adapt to changing priorities.