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Senior rf ic design engineer

Sydney
Silicon Quantum Computing
Design
Posted: 23 April
Offer description

About The Role

SQC is embarking on an ambitious journey to develop Cryo-CMOS chips that will enable the miniaturisation of electronic hardware within our quantum computers. This advancement is crucial for building larger and more complex quantum systems, ultimately supporting our vision of achieving a utility-scale quantum computer.

As a Senior RF IC Design Engineer, you will be instrumental in this pioneering effort, contributing your expertise to the design, simulation, and validation of integrated circuits at cryogenic temperatures that will drive the next generation of quantum computing hardware. Strong analog and RF IC design skills are essential to address the challenges of Cryo-CMOS design, such as working with early, less‑defined models and designing experiments to improve understanding of cryogenic temperature effects.


Role Responsibilities

* Design, simulate, and validate analog and mixed‑signal circuits tailored for quantum computing systems.
* Develop and optimise low‑temperature RF/microwave circuits – including LNAs, mixers, PLLs, LOs, and PAs – using CMOS technology.
* Perform advanced simulations, including Monte Carlo and corner case analyses, to ensure robust circuit operation.
* Participate in IC design planning, risk assessment, and performance benchmarking.
* Operate measurement equipment and resolve issues related to circuit evaluation and testing.
* Prepare comprehensive documentation of designs, simulation outcomes, and measurement data for internal and external stakeholders.
* Collaborate closely with internal teams and external partners, ensuring seamless integration between IC and module design efforts.


Essential Requirements

* Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or a related discipline.
* Significant hands‑on experience with Cadence Virtuoso, Spectre/SpectreRF, Calibre DRC/LVS/PEX.
* In‑depth expertise in IC design across various silicon technologies, including SOI.
* Strong foundation in transistor‑level circuit design.
* Proven ability to design RF building blocks such as LNAs, mixers, PLLs, LOs, PAs, and RF switches in the 1‑10 GHz regime.
* Proficiency in refining simulations to closely match silicon performance.
* Solid understanding of silicon measurement methodologies and data interpretation.
* Highly organised, detail‑oriented, and able to maintain a strategic perspective in a dynamic start‑up environment.
* Excellent communication skills, with the ability to explain complex technical concepts to diverse audiences.


Desirable

* Familiarity with ANSYS EM tools such as HFSS or RaptorX.
* Experience with RF‑oriented processes (e.g., SiGe, GaAs, MMIC) and GF 22FDX.
* Knowledge of optoelectronic drive circuits.
* Hands‑on experience with cryogenic testing and measurement techniques.
* Understanding of semiconductor device physics and low‑temperature circuit operation.
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